The present invention relates to MOS heterostructure, semiconductor device with such a structure, and method for fabricating the semiconductor device.
An MOS field effect transistor (MOSFET) with a metalinsulator-semiconductor structure is well known in the art as a typical field effect transistor. The MOSFET is called as such because an oxide is regarded as a representative insulator of the structure. Thus, in this specification, such a structure including any of various types of insulators will be collectively called an xe2x80x9cMOS heterostructurexe2x80x9d.
Hereinafter, a conventional method for fabricating an MOSFET will be described with reference to FIGS. 9(a) through 9(d).
First, as shown in FIG. 9(a), an ordinary silicon substrate 50, i.e., a semiconductor substrate of single crystal silicon, is prepared. Then, as shown in FIG. 9(b), a silicon oxide film 51 is formed thereon by thermally oxidizing the surface of the silicon substrate 50. The silicon oxide film 51 is mainly composed of amorphous silicon dioxide (SiO2).
Next, a conductive thin film (not shown) such as a polysilicon film is deposited on the silicon oxide film 51. A resist pattern (not shown) is defined thereon to cover part of the conductive thin film in which a gate electrode should be formed. Then, the conductive thin film and silicon oxide film 51 are etched in this order using the resist pattern as a mask. In this manner, a gate insulating film 52 and a gate electrode 53 are formed out of the silicon oxide film 51 and conductive thin film, respectively, in this order on the silicon substrate 50 as shown in FIG. 9(c).
Thereafter, as shown in FIG. 9(d), a sidewall oxide film 54 is formed on the side faces of the gate electrode 53. And the silicon substrate 50 is doped with a dopant using the gate electrode 53 and sidewall oxide film 54 as a mask, thereby forming source/drain regions 55 and 56 in the substrate 50. In this case, when a predetermined voltage is applied between the silicon substrate 50 and gate electrode 53, a channel 57 is formed within a region of the silicon substrate 50 in the vicinity of the interface between the substrate 50 and gate insulating film 52.
In the conventional process, however, some strain is caused in the interface between the silicon substrate 50 and silicon oxide film 51 (hereinafter, called xe2x80x9csilicon/thermal oxide interfacexe2x80x9d) while the surface of the substrate 50 is being thermally oxidized to form the silicon oxide film 51 to be the gate insulating film 52 thereon. This is because the silicon oxide film 51 goes on expanding as the film 51 is growing on the surface of the silicon substrate 50. Accordingly, various structural defects are developed within the silicon substrate 50, thereby possibly creating interface states. These interface states in turn form carrier-trapping sites to cause the dielectric breakdown of the gate insulating film 52 or considerably decrease the mobility of carriers in the channel 57. As a result, the performance of the MOSFET deteriorates and therefore the transistor cannot operate at high speeds anymore.
FIG. 10(a) illustrates a schematic partial cross section of an MOSFET fabricated by the conventional method near the silicon/thermal oxide interface, while FIG. 10(b) illustrates respective energy levels of the conduction and valence bands near the silicon/thermal oxide interface.
According to the conventional method for fabricating an MOSFET, while the silicon oxide film 51 is being formed within a surface region of the silicon substrate 50, part of the surface region is not oxidized completely. As a result, a structural transition layer 51a, which is a silicon suboxide (SiOx, where xxe2x89xa6about 1.7) layer as thin as about 0.2 to about 0.3 nm, is formed as a part of the silicon oxide film 51 in the vicinity of the interface between the film 51 and silicon substrate 50 as shown in FIG. 10(a). An ordinary amorphous SiO2 layer 51b with a thickness of several nanometers is formed on the structural transition layer 51a. The SiOx structural transition layer 51a relaxes a strain caused between the Si substrate 50 and SiO2 layer 51b. However, the chemical bonds in the structural transition layer 51a are easily broken by electrons traveling in the channel 57. In other words, since the structural transition layer 51a is easily broken by the intrusion of electrons, i.e., channel hot electrons, the structural transition layer 51a is electrically unstable.
Also, as shown in FIG. 10(b), the respective energy levels e1 and e2 at the conduction and valence bands are bent in a wide region, including the structural transition layer 51a, within the silicon oxide film 51, i.e., in the gate insulating film 52. Hereinafter, such a phenomenon will be called xe2x80x9cbendingxe2x80x9d. Because of this bending, the band gap of the silicon oxide film 51 considerably decreases vertically downward, i.e., toward the silicon/thermal oxide interface. As a result, the breakdown voltage and reliability of the silicon oxide film 51, i.e., the gate insulating film 52, both greatly decline.
In addition, the thinner that part of the silicon oxide film 51 to be the gate insulating film 52 (i.e., the SiO2 layer 51b), the higher percentage of the silicon oxide film 51 the structural transition layer 51a accounts for. Thus, the thicker the structural transition layer 51a is getting, the more seriously the performance of the transistor is affected by the structural defects in the silicon/thermal oxide interface.
Specifically, the structural transition layer 51a is about 0.2 to about 0.3 nm thick and that part of the silicon oxide film 51 with a decreased band gap is as thick as about 1 nm. Even if the thickness of the silicon oxide film 51 is reduced, however, the thickness of the structural transition layer 51a remains almost the same. Accordingly, if the thickness of the silicon oxide film 51 is reduced, then the structural transition layer 51a accounts for the increased percentage of the silicon oxide film 51. In addition, a larger proportion of the silicon oxide film 51 comes to have a smaller band gap. As a result, the silicon oxide film 51, i.e., the gate insulating film 52, has its breakdown voltage further decreased.
Furthermore, as the structural transition layer 51a accounts for an increasing percentage of the silicon oxide film 51, then the thickness of the silicon oxide film 51 becomes non-uniform or the silicon/thermal oxide interface is roughened. In such a case, the electrons in the channel 57 travel along the silicon/thermal oxide interface while being affected by the roughened interface. As a result, the probability of electron scattering increases. Moreover, as a field effect transistor is downsized, the effective vertical field intensity, which is the intensity of an electric field vertical to the silicon/thermal oxide interface, rises, thus making the electron scattering phenomenon even more significant. Accordingly, if the gate insulating film 52 is thinned to downsize an MOSFET, then the mobility of electrons in the channel 57, or the transconductance, decreases, thereby interfering with the performance enhancement of the MOSFET.
A first, general object of the present invention is providing an MOS heterostructure with reduced structural defects in a semiconductor substrate.
A second, more specific object of the present invention is providing an MOS heterostructure where no structural transition layer exists within a region of an insulating film on a semiconductor substrate in the vicinity of the interface between the insulating film and the substrate.
To achieve the first object, an MOS heterostructure according to the present invention includes: a single crystal silicon substrate; an insulating film formed on the substrate; and a conductive film formed on the insulating film. The substrate includes a plurality of terraces and steps formed as a result of rearrangement of silicon atoms on the surface of the substrate. Each of the steps is located in a boundary between an adjacent pair of the terraces. The insulating film contains crystalline silicon dioxide that has grown epitaxially over the steps.
In the MOS heterostructure according to the present invention, the substrate includes a plurality of terraces and steps formed as a result of rearrangement of silicon atoms on the surface of the substrate. In addition, the insulating film contains crystalline silicon dioxide that has grown epitaxially over the steps. Accordingly, crystal lattice continuity is maintained in the interface between the single crystal silicon substrate and the crystalline silicon dioxide, and no great strain is created in the vicinity of the interface while the insulating film is being formed. Thus, substantially no structural defects are developed in the single crystal silicon substrate.
To achieve the second object, the crystalline silicon dioxide preferably forms a two-dimensionally-linked crystal film on the substrate in the MOS heterostructure of the present invention.
In such a case, no structural transition layer of suboxide is formed in a region of the crystal film, i.e., at least the lower part of the insulating film, in the vicinity of the interface between the crystal film and the substrate.
In the embodiment where the crystalline silicon dioxide forms the crystal film, the crystalline silicon dioxide preferably further grows epitaxially along the respective surfaces of the terraces to form the crystal film.
In such a case, a two-dimensionally-linked crystal film can be formed out of the crystalline silicon dioxide over the single crystal silicon substrate with more certainty.
In this particular embodiment, the thickness of the insulating film is preferably 4 nm or less.
In such a case, the overall insulating film may consist solely of the crystal film made of the crystalline silicon dioxide.
In an alternate embodiment, the insulating film preferably further includes a dielectric film formed on the crystal film.
In such a case, even if the crystal film is thin, the leakage current flowing from the single crystal silicon substrate can be reduced.
In this particular embodiment, a relative dielectric constant of the dielectric film is preferably higher than that of a silicon dioxide film.
In such a case, the leakage current flowing from the single crystal silicon substrate can still be reduced substantial without increasing the thickness of the insulating film.
In another embodiment of the present invention, an angle of misorientation against the surface of the substrate is preferably in the range from 1 to 30 degrees.
In such a case, the terraces and steps can be formed on the single crystal silicon substrate without creating the interface states in the substrate.
To achieve the first object, a semiconductor device according to the present invention includes: a single crystal silicon substrate; and a plurality of MOS transistors formed on the substrate. Each said MOS transistor includes: an insulating film formed on the substrate; a gate electrode formed on the insulating film; a channel region formed within the substrate; and source/drain regions electrically connected to the channel region. The substrate includes a plurality of terraces and steps formed as a result of rearrangement of silicon atoms on the surface of the substrate. Each of the steps is located in a boundary between an adjacent pair of the terraces. The insulating film contains crystalline silicon dioxide that has grown epitaxially over the steps.
In the semiconductor device according to the present invention, the substrate includes a plurality of terraces and steps formed as a result of rearrangement of silicon atoms on the surface of the substrate. In addition, the insulating film contains crystalline silicon dioxide that has grown epitaxially over the steps. Accordingly, crystal lattice continuity is maintained in the interface between the single crystal silicon substrate and the crystalline silicon dioxide, and no great strain is created in the vicinity of the interface while the insulating film is being formed. Thus, almost no structural defects are produced in the single crystal silicon substrate. Therefore, it is possible to substantially eliminate the interface states causing the dielectric breakdown of the insulating film and/or decreasing the mobility of carriers in the channel. As a result, the performance of the transistor can be enhanced and the operating speed thereof can be increased.
To achieve the second object, the crystalline silicon dioxide preferably forms a two-dimensionally-linked crystal film on the substrate in the semiconductor device of the present invention.
In such a case, no structural transition layer of suboxide is formed in a region of the crystal film, i.e., at least the lower part of the insulating film, in the vicinity of the interface between the crystal film and the substrate. Accordingly, chemical bonds in that region of the insulating film near the interface between the insulating film and the substrate are not broken by hot electrons. In addition, the decrease in band gap of the insulating film due to bending can also be avoided, thus increasing the breakdown voltage and reliability of the insulating film.
In the embodiment where the crystalline silicon dioxide forms the crystal film, the crystalline silicon dioxide preferably further grows epitaxially along the respective surfaces of the terraces to form the crystal film.
In such a case, a two-dimensionally-linked crystal film can be formed out of the crystalline silicon dioxide over the single crystal silicon substrate with more certainty.
In this particular embodiment, the steps preferably extend substantially in a channel longitudinal direction.
In such a case, carriers in the channel does not cross the steps, but travel from the source toward drain regions in the interface between the terraces, which can be regarded as being smooth at the atomic level, and the crystal film. As a result, a much smaller number of carriers are scattered at the interface. That is to say, the mobility of the carriers in the channel can be increased.
In an alternate embodiment, each said MOS transistor preferably further includes a control gate, which is capacitively coupled to the gate electrode, and preferably constitutes a nonvolatile memory cell in which the gate electrode functions as a floating gate. And the steps preferably extend to cross a channel longitudinal direction approximately at right angles.
In such a case, the carriers in the channel travel from the source toward drain regions while crossing the steps. Accordingly, hot electrons, which have been generated in the vicinity of the steps, can be injected into the floating gate more efficiently.
To achieve the first object, a method according to the present invention is adapted to fabricate a semiconductor device with an MOS heterostructure. The MOS heterostructure includes: a single crystal silicon substrate; an insulating film formed on the substrate; and a conductive film formed on the insulating film. The method includes the step of a) forming a plurality of terraces and steps on the surface of the substrate by rearranging silicon atoms. within the surface. Each of the steps is located in a boundary between an adjacent pair of the terraces. The method further includes the step of b) epitaxially growing crystalline silicon dioxide, which will form at least part of the insulating film, over the steps by thermally oxidizing the surface of the substrate while preventing the surface from being contaminated.
According to the method of the present invention, terraces and steps are formed on the surface of a single crystal silicon substrate by rearranging silicon atoms within the surface, and then crystalline silicon dioxide, which will form at least part of the insulating film, is epitaxially grown over the steps. Accordingly, crystal lattice continuity is maintained in the interface between the single crystal silicon substrate and the crystalline silicon dioxide, and no great strain is created in the vicinity of the interface during the formation of the insulating film. Thus, substantially no structural defects are developed in the single crystal silicon substrate.
To achieve the second object, the step b) preferably further includes forming a two-dimensionally-linked crystal film over the substrate by further growing epitaxially the crystalline silicon dioxide along respective surfaces of the terraces.
In such a case, no structural transition layer of suboxide is formed in a region of the crystal film, i.e., at least the lower part of the insulating film, in the vicinity of the interface between the crystal film and the substrate.
In the embodiment where the step b) includes forming the crystal film, the step b) preferably further includes thermally oxidizing the surface such that the thickness of the insulating film is equal to or smaller than 4 nm.
In such a case, the overall insulating film may consist solely of the crystal film made of the crystalline silicon dioxide.
In an alternate embodiment, the method preferably further includes the step of depositing a dielectric film, which has a relative dielectric constant higher than that of a silicon dioxide film, on the crystal film after the step b) has been performed.
In such a case, the leakage current flowing from the single crystal silicon substrate can still be reduced substantial without increasing the thickness of the insulating film.